Intel Celeron 600 "Coppermine128"

The first Celerons, without any L2 cache, were based on the Deschutes core that was also used on the Pentium IIs. 

The Deschutes core featured MMX instructions but didn’t have any SSE optimizations since the core was produced about 1.5 years before Intel ever unveiled their SSE instructions.  The core itself was manufactured on Intel’s 0.25-micron process, which accounted for some of its initial overclocking success on the first Celerons, especially since it had no L2 cache to limit its clock speed potential. 

The second generation Celerons, starting with the Celeron 300A and extending all the way up to the 533MHz part that was released in January of this year, made use of the Mendocino core which never appeared on another chip outside of the Celeron.  Like the Deschutes core, the Mendocino core was built on Intel’s 0.25-micron process but added a full 128KB of on-die L2 cache which is where the Deschutes fell short.  Other than that, the two cores are virtually identical. 

For the first time since August 1998, the Celeron is receiving a new core, internally referred to as Coppermine128.  This new core provides a huge change in comparison to the past two Celeron cores.  Just like the original Celeron was a derivative of the Pentium II (it used the same core), the new Celeron is a derivative of the present day Pentium III processor.

If you recall, the Pentium III’s core is called the Coppermine, and what primarily defines the Coppermine is its 256KB Advanced Transfer Cache and the SSE instructions that have been with the Pentium III since day one. 

The Coppermine128 core features the same advantages of the Pentium III’s core such as its SSE instructions and an Advanced Transfer Cache, but it drops the L2 cache size down to 128KB (hence the name Coppermine128) versus the 256KB found in the Pentium III’s Coppermine core. 

While it may seem like the main improvement to the new Celerons is the addition of SSE instructions because, after all, the Celeron A also had 128KB of on-die L2 cache, there is more than meets the eye with this new Celeron.