Intel Mobile CPU & Chipset Roadmap - November 2000

New Tricks: The Tualatin core

As you may have read about in our Intel Desktop & Chipset Roadmap from this month, the aging Pentium III Coppermine core seems to finally be reaching its limits. With the recall of the 1.13 GHz Pentium IIIs, it became quite clear that the 0.18 micron core was just not small enough to push the Pentium III up to the speed necessary to compete in today's market. Intel's solution: the Tualatin, a processor that will also quickly find its way into mobile systems of the future.

The Tualatin core, which is a shrink of the existing Coppermine core from 0.18 micron to 0.13 micron, seems to make the most sense for the mobile platform. A shrink in the manufacturing process may be important on the desktop side in order to allow for higher clock speed processors, but in the mobile market, a die shrink does much more than that.

First off, the reduction to a 0.13 micron process means that for each clock speed less heat is generated. Heat is a major concern when designing notebooks, as processors with a high heat output can not be sufficiently cooled while in the space constraints of a notebook. As you can imagine, cooling a processor in a notebook is quite a task and one that is not easily dealt with.

Although heat is a major concern, the cause of this heat is an even greater one. The reason that extensive heat is produced in higher speed processors is that the power needed to drive this chips is large. The resistance this power encounters inside the chip is what generates the heat. When the manufacturing process is shrunk, not only is die size and heat decrease but the resistance encountered within the chip is also decreased. For this reason, the Tualatin's 0.13 micron process will not only produce less heat than it's older 0.18 micron Coppermine brother but will also require less power. And less power means longer battery life and higher processor speeds.

As result of this decreased power consumption and increased clock speed, the Tualatin core is key to Intel's mobile success. Intel's plans currently call for the introduction of the Tualatin processor with SpeedStep technology in the second half of 2001, most likely some time in the third quarter, which means it should be announced nearly the same time as the desktop Tualatin-256 part. The chip will arrive in the mobile platform at two speed grades which have been loosely defined as greater than 1.0 GHz and greater than or equal to 1.2 GHz. Since there will already be a 1.0 GHz Pentium III part, it only makes sense that the Tualatin is clocked slightly above this in its introduction. We suspect that the lower end Tualatin may clock in at 1.13 GHz with a 1.2 GHz brother on the higher speed front.

The most interesting aspect of the Tualatin mobile part is its included cache size. You may have noticed that the Tualatin mobile chip is named just that, unlike the desktop's Tualatin-256 part. The reason for this is that it appears that Intel has stuck to its original Tualatin plans in the mobile front, as the chip contains 512K of cache. This is quite an odd decision on Intel's part, as it means a few things.

First off, the increase in cache size (over the desktop part) means that the mobile Tualatin part will actually use more power than the desktop part. Since the included cache increases die size and complexity of the chip, the mobile Tualatin parts will consume more power than the 256K desktop parts. The second thing that this means is that the mobile Tualatins will actually be more powerful than the desktop Tualatin-256. The increased cache size means that the mobile Tualatin part should perform faster than the desktop part in a clock for clock comparison. This is quite interesting, considering in the past we have become accustomed to seeing lower performing chips in mobile systems.